With the increasing down-scaling of integrated circuits and the increasingly demanding requirements to the speed of integrated circuits, transistors need to have higher drive currents with increasingly smaller dimensions. Fin Field-Effect Transistors (FinFET) were thus developed. The FinFETs include vertical semiconductor fins above a substrate. The semiconductor fins are used to form source and drain regions, and channel regions between the source and drain regions. Shallow Trench Isolation (STI) regions are formed to define the semiconductor fins. The FinFETs also include gate stacks, which are formed on the sidewalls and the top surfaces of the semiconductor fins.
In the formation of the STI regions and the formation of the FinFETs, various wet etch steps and clean steps are performed. These steps cause the recess of the top surfaces of STI regions. As a result of the wet etch steps and clean steps, the center portions of the top surfaces of the STI regions may be lower than edge portions of the top surfaces of the STI regions. The STI regions with such a surface profile are known as having a (concave shape) smiling profile.
In some FinFETs, there are semiconductor strips underlying the semiconductor fins. In the respective FinFETs, parasitic capacitors are formed between the gate electrodes of the FinFETs and the neighboring semiconductor strip, wherein the STI regions act as the insulators of the parasitic capacitors. The parasitic capacitance of the parasitic capacitors adversely affects the performance of the respective integrated circuit, and needs to be reduced.
In addition, some of the FinFETs use germanium-containing materials to form fins. Germanium may form germanium oxide with the neighboring oxides in the STI regions. The germanium oxide causes the increase in the leakage current of the resulting FinFET.